1. Field of the Invention
The present invention relates to a semiconductor device manufactured using an SOI (Silicon On Insulator) substrate and a manufacturing method thereof.
2. Description of the Related Art
In recent years, VLSI technology has been drastically progressed, and an SOI structure by which speeding up and low power consumption are realized has been attracted attention. In this technology, an active region (a channel formation region) of a field effect transistor (FET), which has been conventionally formed of a bulk single crystal silicon, is formed of a thin-film single crystal silicon.
In a substrate used for the SOI structure, a thin-film silicon layer is formed over a single crystal silicon substrate with a buried oxide film layer interposed therebetween. Therefore, it has been known that when a MOS (Metal Oxide Semiconductor) field effect transistor (MOSFET) is manufactured using an SOI substrate, the parasitic capacitance can be reduced than the conventional case of using a bulk single crystal silicon substrate, and such a MOSFET is advantageous for speeding up.
Pattern diagrams of a conventional thin film transistor using an SOI substrate are FIGS. 12A to 12C. FIG. 12A is a top diagram of the thin film transistor, FIG. 12B is a cross-sectional diagram along a dashed line O-P in FIG. 12A, and FIG. 12C is a cross-sectional diagram along a dashed line Q-R in FIG. 12A. Note that in FIG. 12A, a thin film and the like included in the thin film transistor are partially omitted.
The thin film transistor shown in FIGS. 12A to 12C is formed using an SOI substrate 9005 in which an insulating layer 9002 and a silicon layer 9006 are stacked in order over a support substrate 9000. The silicon layer 9006 is formed into an island shape, and a conductive layer 9012 which functions as a gate electrode is formed over the silicon layer 9006 with a gate insulating layer 9004 interposed therebetween. Further, the silicon layer 9006 includes a channel formation region 9008 which is formed in a region overlapping with the conductive layer 9012 with the gate insulating layer 9004 interposed therebetween, and an impurity region 9010 which functions as a source or drain region.    Japanese Published Patent Application No. 2005-019859
However, in the above-described thin film transistor using an SOI substrate, various defects occur due to an end portion of the island-shaped silicon layer. For example, in the case of using an SOI substrate, a gate insulating layer can be formed by oxidizing a surface of a silicon layer with a thermal oxidation method. With the use of the thermal oxidation method, a good insulating layer can be obtained whereas there is a problem in that oxidation also progresses from an end portion of the silicon layer so that the gate insulating layer 9004 enters the end portion of the silicon layer as shown by a dashed line 9007 in FIG. 12B.
Further, due to an effect of an etching process, a washing process using hydrofluoric acid or the like, or the like in shaping the silicon layer into an island shape, an insulating layer provided under the silicon layer may be removed. In particular, in the case where the silicon layer is made into a thin film, that effect becomes remarkable. In this case, as shown by a dashed line 9009 in FIG. 12C, coverage with the gate insulating layer tends to decrease near the end portion of the silicon layer.
On the other hand, in the case where the gate insulating layer is formed by using a CVD method or a sputtering method instead of a thermal oxidation method, coverage with the gate insulating layer tends to decrease at the end portion of the silicon layer because there is a step at the end portion of the silicon layer.
When the coverage with the gate insulating layer at the end portion of the silicon layer is not enough, there may be short-circuiting with a conductive layer forming a gate electrode or occurrence of a leakage current. Further, insufficiency of coverage with the gate insulating layer also causes electro-static discharge (ESD) or the like of an element or the gate insulating layer. In particular, for low power consumption or high operating speed of a thin film transistor, making the gate insulating layer a thinner film has been desired, and the insufficiency of coverage with the gate insulating layer becomes a more significant problem in the case where the gate insulating layer is made thin. Furthermore, as the gate insulating layer is made thinner, the problem of electro-static discharge becomes serious.
Further, at the end portion of the silicon layer, particularly at a region where the conductive layer forming the gate electrode overlaps with the silicon layer, there is also a problem in that a leakage current due to concentration of electric field tends to occur at a corner portion (a corner).